Analog Compact Modeling for a 20-120V HV CMOS Technology
نویسندگان
چکیده
In this paper we present a full characterization of HV CMOS transistors for a 20-120V CMOS technology including DC, AC and mismatch behavior. The model is based on a sub-circuit, which describes the geometry dependent AC and DC behavior of the device as well as the parasitic substrate currents and capacitance. The sub-circuit includes the correct description of the drain current and the parasitic substrate current with forward biased diodes as well. A proper mismatch model for HV CMOS transistors including an efficient parameter extraction strategy is presented.
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